Mixer differential amplifier design

Our first post on mixers focused on essential mixer theory and passive mixers. Understanding the diode double-balanced mixer is a great start, but that still leaves many mixer architectures unexplored. The most commonly used passive mixer is the diode double-balanced mixer. Its good dynamic range, moderate noise figure, high intercept, and all-around good performance make it a popular choice. This is where active mixers come in. They can not only provide gain, but also need less LO drive power to work.

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• US20040061544A1 - Mixer circuit and differential amplifier circuit - Google Patents
• Op Amp Summing Amplifier: Virtual Earth Mixer
• R C JAEGER e T BLALOCK Microelectronic Circuit Design
• Summing Amplifier : Circuit Diagram and Its Applications
• 6.3: Single-Ended, Balanced, and Double Balanced Mixers
• US5805987A - Double balanced mixer circuit with less power consumption - Google Patents
• Fully Differential Amplifier to drive Capacitive Load and Resistive Load
• Active Mixers in RF Design
• MOD WIGGLER

WATCH RELATED VIDEO: Op Amp Summing Amplifier - Operational Amplifier Virtual Earth Mixer

US20040061544A1 - Mixer circuit and differential amplifier circuit - Google Patents

Effective date : Year of fee payment : 4. A double balanced mixer circuit of reduced power consumption includes two single balanced mixer circuits each of which has a pair of first transistors. Output side terminals of the first transistors are cross-coupled between the two pairs, and first differential signals are supplied to control terminals of the first transistors. Connected in series to each pair of first transistors is a second transistor of a pair of second transistors.

The double balanced mixer circuit also includes a differential amplifier circuit including a pair of third transistors, with fourth transistors connected to the pair of third transistors. The fourth transistors function as constant current sources for the pair of third transistors.

Second differential signals are supplied to control terminals of the third transistors and differential output terminals of the third transistors are directly coupled to control terminals of the pair of second transistors.

Field of the Invention. The present invention relates to a double balanced mixer circuit, and more particularly to a double balanced mixer circuit of a direct-conversion quadrature modulator for transmitting a digital signal. The figure illustrates the structure of a current-folded type of double balanced mixer circuit which is composed only of NPN transistors and in which two transistors are stacked in a vertical direction. Referring to FIG. The collectors of two differential pairs of transistors are cross-coupled to form a core section of the double balanced mixer circuit.

Baseband differential voltage signals are converted differential current signals by a differential amplifier which is composed of differential pair of transistors 68 and 69 whose emitters are connected to each other via an emitter resistance 88 , and current mirror circuit which is composed of transistors 74 and 78 ; and 75 and The differential amplifier includes constant current sources 70 and 71 and a current summation of the two single balanced mixer circuits is held at a constant value.

The structure of the conventional double balanced mixer circuit will be explained in more detail with reference to FIG. In the following description, "a transistor Q3" means a third transistor. In the same way, "a resistor R8 89 " means the eighth resistor 89 and the numeric value of "89" indicates a reference number in the figure. This is the same as in all the other figures. The bases of those transistors are together connected to a bias voltage terminal V B The base of the transistor Q4 71 is connected to the baseband signal terminal V BB - A resistor R7 88 is connected between the emitters of the transistors Q1 68 and Q2 The collector of the transistor Q1 68 is connected to one terminal of a resistor R5 86 and the collector of the transistor Q2 69 is connected to one terminal of a resistor R6 The other terminal of each of the resistors R5 86 and R6 87 is connected to a power supply voltage terminal Vcc The base of the transistor Q5 72 is connected to the collector of the transistor Q1 68 and the base of the transistor Q6 73 is connected to the collector of the transistor Q2 The emitter of the transistor Q5 72 is connected to the base and collector of an NPN transistor Q7 Also, the emitter of the transistor Q6 73 is connected to the base and collector of an NPN transistor Q8 Thus, emitter follower circuits are added to the differential amplifier.

The emitter of a transistor Q7 74 is connected to the ground terminal GND via a resistor R4 85 and the emitter of the transistor Q8 75 is connected to the ground terminal GND via a resistor R10 The base of the transistor Q11 78 is connected to the base and collector of the transistor Q7 The base of the transistor Q14 81 is connected to the base and collector of the transistor Q8 Thus, current mirror circuits are constituted.

The collectors of the transistors Q9 76 and Q10 77 are connected to the power supply voltage terminal Vcc 60 via resistors R1 82 and R2 83 , respectively. The collectors of the transistor Q12 79 and Q13 80 are respectively connected to the collectors of the transistors Q10 77 and Q9 76 to form the above-mentioned cross-coupling.

By the above structure, the double balanced mixer circuit which has the two single balanced mixer circuits is constituted. Tsukahara et al. The output voltages of the differential amplifier are dropped by the above-mentioned two emitter follower circuits which are composed of the NPN transistors Q5 72 and Q7 74 and the resistors R4 85 ; and the NPN transistor Q6 73 and Q8 75 and the resistor R10 91 such that the baseband differential signals are inputted to the bases of the NPN transistors Q11 78 and Q14 81 , respectively.

As shown in FIG. This is based on the following reason. That is, because minority carriers traveling through the base area of a transistor are holes in a PNP transistor, the PNP transistor is inferior to an NPN transistor in high frequency characteristic. For this reason, the development of the PNP transistor for a very high speed device does not progress and almost of circuits for the very high speed device is composed only of the NPN transistors.

However, in the above-mentioned double balanced mixer circuit, there is a problem in that the circuit structure is complicated and the current consumption is great because the circuit is composed only of the NPN transistors. Therefore, the present invention is accomplished in view of the problem as described above. An object of the present invention is to provide a double balanced mixer circuit in which PNP transistors are used so that power consumption can be reduced.

In order to achieve an aspect of the present invention, a double balanced mixer circuit includes two single balanced mixers each of which is composed of pair of first transistors, wherein output side terminals of the first transistors are cross-coupled between the two pairs, first differential signals are supplied to control terminals of the first transistors, a second transistor connected to each of the pairs of first transistors in series, and a differential amplifier circuit including a pair of third transistors and fourth transistors as constant current sources connected to the pair of third transistors, wherein second differential signals are supplied to control terminals of the third transistors and differential output terminals of the third transistors are directly coupled to control terminals of the second transistors, respectively.

The terminals of the third transistors on the side of the fourth transistors are coupled to each other via a resistor.

Also, at least one of the third and fourth transistors may be a PNP bipolar transistor or a P-channel MOS transistor when the second differential signals have frequencies equal to or lower than 20 MHz. In the preferred embodiment, a double balanced mixer circuit includes a pair of first and second NPN transistors whose collectors are respectively connected to a power supply higher potential side line via first and second resistors.

The collector of a third NPN transistor is connected to emitters of the first and second transistors in common and the emitter thereof is connected to a power supply lower potential line via a third resistor.

A pair of fourth and fifth NPN transistors are respectively connected at their collectors to the power supply higher potential side line via the second and first resistors. The collector of a sixth NPN transistor is connected to emitters of the fourth and fifth transistors in common and the emitter thereof is connected to the power supply lower potential line via a fourth resistor.

The emitters of seventh and eighth PNP transistors are respectively connected to the power supply higher potential line via fifth and sixth resistors and the collectors thereof are connected to each other via a seventh resistor. The emitters of ninth and tenth PNP transistors are respectively connected to the collectors of the seventh and eighth PNP transistors and the collectors thereof are respectively connected to the power supply lower potential line via eighth and ninth resistors and to bases of the third and sixth NPN transistors.

A constant bias is supplied in common to the bases of the seventh and eighth PNP transistors. Baseband differential signals are respectively supplied to a set of bases of the first and fourth NPN transistors and a set of bases of the second and fifth NPN transistors, and local differential signals are respectively supplied to bases of the ninth and tenth PNP transistors. The double balanced mixer circuit of the present invention will be described below in detail with reference to the accompanying drawings.

The collectors of the NPN transistors 13 and 14 are connected to a power supply terminal Vcc 1 via resistors 19 and 20 , respectively. The collectors of NPN transistors 16 and 17 are connected to the collector of NPN transistors 14 and 13 in a cross-coupled manner. There is provided a differential amplifier which is composed of PNP transistors 9 and The emitters of the PNP transistors 9 and 10 are connected through a resistor PNP transistors 11 and 12 connected to the emitters of the PNP transistors 9 and 10 function as constant current sources of the differential pair of transistors 9 and Next, the double balanced mixer circuit of the first embodiment of the present invention will be described in more detail.

The double balanced mixer circuit includes a differential amplifier in which the emitters of the PNP transistors Q3 and Q4 11 and 12 are connected to the power supply terminal Vcc via resistors R4 and R5 22 and 23 , respectively.

The PNP transistors Q3 and Q4 11 and 12 act as constant current sources of the differential amplifier. The collector of the transistor Q1 9 as an output terminal is connected to a ground terminal GND via a resistor R7 25 and the collector of the transistor Q2 10 as an output terminal is connected to the ground terminal GND via a resistor R8 The double balanced mixer circuit further includes two single balanced mixer circuits.

The collectors of the NPN transistors Q5 13 and Q6 14 are connected to the power supply voltage terminal Vcc 1 via resistors R1 19 and R2 20 , respectively.

In this manner, the double balanced mixer circuit including the two single balanced mixer circuits is constituted. The differential baseband signals are amplified by the differential amplifier which is composed of the PNP transistors and directly supplied from the collectors as the output terminals of the PNP transistors Q1 9 and Q2 10 to the bases of the NPN transistors Q7 15 and Q10 The local signal and the baseband signal are mixed and are amplified by the single balanced mixer which is composed of the NPN transistors Q5 13 , Q6 14 and Q7 15 and the single balanced mixer which is composed of the NPN transistors Q8 16 , Q9 17 and Q10 As seen from FIG.

Because the signal frequency of the baseband signal is typically a low frequency signal in a range from hundreds of Kilo Hertzes KHz to several Mega Hertzes MHz in case of the quadrature modulator, the differential amplifier for amplifying the baseband signal is not necessary to be composed of the NPN transistors as in the conventional example. If the differential amplifier is composed of the PNP transistors, the two emitter followers which are used in the above conventional circuit can be removed.

In the conventional double balanced mixer circuit shown in FIG. On the other hand, in the double balanced mixer circuit according to the first embodiment of the present invention, substantially the same simulation results as those of the conventional example were obtained in the power supply voltage Vcc of 3 V and a total current Icc of Next, FIG.

In this embodiment, MOS FETs metal-oxide-semiconductor field effect transistors such as GaAs FETs for high frequency are used in place of the bipolar transistors in the above-mentioned first embodiment.

The first and the second FETs 38 and 39 which constitute the differential amplifier and the third and fourth FETs 40 and 41 which constitute the constant current source of the differential amplifier has source terminals on the side of the power supply higher potential. The fifth to seventh FETs 42, 43 and 44 which constitute a single balanced mixer and the eighth to tenth FETS 45, 46 and 47 which constitute another single balanced mixer have drain terminals on the side of the power supply higher potential.

As a result, the low power supply voltage-type double balanced mixer circuit can be obtained as in the above-mentioned first embodiment.

As described above, according to the present invention, the differential amplifier to which the baseband signal is inputted is composed of the PNP transistors, so that the two emitter follower circuits which are used in the conventional example can be reduced.

Also, according to the present invention, the low power supply voltage-type double balanced mixer circuit can be achieved using FETs. What is claimed is: 1. A double balanced mixer circuit comprising: two single balanced mixer circuits each of which is composed of a pair of first transistors, wherein output side terminals of said first transistors are cross-coupled between said two pairs, first differential signals are supplied to control terminals of said first transistors;.

A double balanced mixer circuit according to claim 1, wherein said first transistors are NPN bipolar transistors. A double balanced mixer circuit according to claim 1, wherein said pair of second transistors are NPN bipolar transistors.

A double balanced mixer circuit according to claim 1, wherein said first transistors are N-channel MOS transistors. A double balanced mixer circuit according to claim 1, wherein said pair of second transistors are N-channel MOS transistors. A double balanced mixer circuit according to claim 1, wherein said third transistors are PNP bipolar transistors. A double balanced mixer circuit according to claim 1, wherein said third transistors are P-channel MOS transistors. A double balanced mixer circuit according to claim 1, wherein said fourth transistors are PNP bipolar transistors.

A double balanced mixer circuit according to claim 1, wherein said fourth transistors are P-channel MOS transistors. A double balanced mixer circuit according to claim 1, wherein said second differential signals have frequencies equal to or lower than 20 MHz. A double balanced mixer circuit according to claim 1, wherein terminals of said third transistors on the side of said fourth transistors are coupled to each other via a resistor. A double balanced mixer circuit according to claim 1, wherein said pair of first transistors and said second transistor connected to said pair of first transistors in series are provided between power supply lines and said differential amplifier circuit is provided between said power supply lines.

A double balanced mixer circuit comprising: a pair of first and second NPN transistors whose collectors are respectively connected to a power supply higher potential side line via first and second resistors;.

A double balanced mixer circuit according to claim 13, wherein said second differential signals have frequencies equal to or lower than 20 MHz. A double balanced mixer circuit according to claim 13, wherein at least one of said NPN transistors each having said emitter, base and collector is replaced by an N-channel MOS transistor having a source, gate and drain.

A double balanced mixer circuit according to claim 13, wherein at least one of said PNP transistors each having said emitter, base and collector is replaced by a P-channel MOS transistor having a source, gate and drain.

Op Amp Summing Amplifier: Virtual Earth Mixer

Effective date : Year of fee payment : 4. A double balanced mixer circuit of reduced power consumption includes two single balanced mixer circuits each of which has a pair of first transistors. Output side terminals of the first transistors are cross-coupled between the two pairs, and first differential signals are supplied to control terminals of the first transistors. Connected in series to each pair of first transistors is a second transistor of a pair of second transistors. The double balanced mixer circuit also includes a differential amplifier circuit including a pair of third transistors, with fourth transistors connected to the pair of third transistors.

R C JAEGER e T BLALOCK Microelectronic Circuit Design

In electronics , the Gilbert cell is a type of mixer. It produces output signals that are proportional to the product of two input signals. Such circuits are widely used for frequency conversion in radio systems. As a mixer, its balanced operation cancels out many unwanted mixing products, resulting in a "cleaner" output. It is a generalized case of an early circuit first used by Howard Jones in , [2] invented independently and greatly augmented by Barrie Gilbert in The specific property of this cell is that the differential output current is a precise algebraic product of its two, differential analog current inputs. In this topology, there is little difference between the Jones cell and the translinear multiplier. However, I C here is given by v be,rf g m,rf. Combining the two difference stages output currents yields four-quadrant operation.

Summing Amplifier : Circuit Diagram and Its Applications

The present invention relates to a differential amplifier and a mixer for improving the linearity. The differential amplifier circuit according to this present invention, includes first and second load stages each having a predetermined voltage value, a main differential amplifier unit having a first differential stage that forms a differential pair in such a way as to amplify a difference between a first input voltage and a second input voltage, and a constant current source, which has a predetermined current driving capability and is connected serially The differential amplifier circuit according to this present invention, includes first and second load stages each having a predetermined voltage value, a main differential amplifier unit having a first differential stage that forms a differential pair in such a way as to amplify a difference between a first input voltage and a second input voltage, and a constant current source, which has a predetermined current driving capability and is connected serially between a power source voltage terminal and a ground terminal, and a auxiliary differential amplifier unit having a second differential stage that forms a differential pair in such a way as to amplify a difference between a third input voltage and a fourth input voltage connected between the first load stage and a second load stage, and the ground, respectively. What is claimed is: 1.

6.3: Single-Ended, Balanced, and Double Balanced Mixers

As previously explained, a relatively high-gain receiver configuration has been chosen. For this reason, the RF mixer has been implemented using a differential input amplifier plus a Gilbert cell. Figure shows the final simplified circuit diagram. Taking previous design considerations into account , the input impedance of the Gilbert cell has been set to optimise the power consumption, gain, NF, and linearity of the entire RF mixer. If the input impedance is increased by degenerating the Gilbert cell, the gain of the cell will be lower and the NF will be higher.

US5805987A - Double balanced mixer circuit with less power consumption - Google Patents

The course covers the topics on how to derive the RF wireless systems specifications, and how to design the main building blocks of a transceiver, i. It is divided into two parts: 1 theoretical lectures will cover the basis of RF and mmWave Circuit Design; and 2 design labs will include simulation and implementation of these circuits. The design labs are completely optional for obtaining the certificate, but they are recommended because they allow students to put into practice all the acquired theoretical knowledge, and of course, implementing the circuits is where all the fun is! But ultimately, this would allow students to design and build their own transceiver at home! The course contains theoretical video classes with examples, quizzes, and an entire set of simulation files, step-by-step procedures, recorded data of real-life circuits, and solution videos so that students can learn from and build even better circuits.

Fully Differential Amplifier to drive Capacitive Load and Resistive Load

Moderators: Kent , luketeaford , Joe. Post by alphabetter » Sun Jun 02, pm. Post by daverj » Sun Jun 02, pm. Post by alphabetter » Mon Jun 03, am.

Active Mixers in RF Design

RELATED VIDEO: Gilbert Cell Mixer

A Gilbert cell is a cross-coupled differential amplifier, similar to the topology in figure 1, where the gain is controlled by modulating the emitter bias current. The amplitude of a differential input RF signal, applied to pins 6 and 7 of the HFA, can be linearly controlled by a differential ac voltage applied to pins 1 and 4. Because the gain control is highly linear, Gilbert cells are often referred to as four-quadrant multipliers and have common applications as mixers, AGC amplifiers, amplitude modulators, double sideband DSB modulators, single sideband SSB modulators, AM detectors, SSB and DSB detectors, frequency doublers, squaring circuits, dividers, square-root circuits, and root-mean-square, r. In order to understand how the Gilbert cell operates, it is necessary to review some fundamental concepts of bipolar transistors. Bipolar Junction Transistor Models. Figure 2 shows two equivalent small signal models for a bipolar transistor.

MOD WIGGLER

Op-amp Tutorial Includes: Introduction Circuits summary Inverting amplifier Summing amplifier Non-inverting amplifier Variable gain amplifier High pass active filter Low pass active filter Bandpass filter Notch filter Comparator Schmitt trigger Multivibrator Bistable Integrator Differentiator Wien bridge oscillator Phase shift oscillator The properties of the op amp circuit for an inverting amplifier mean that it lends itself to being the ideal platform for a summing amplifier. In this configuration the operational amplifier inverting amplifier is used as a virtual earth mixer. It finds many uses where several analogue signals need to be summed. One is as an audio mixer, although it is widely used in many other areas of electronic circuit design. The advantage of using an op-amp inverting amplifier is that the summing point is virtually at earth potential and therefore the settings and signals from each different channel do not affect each other.

Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It only takes a minute to sign up. Connect and share knowledge within a single location that is structured and easy to search. I'm designing probably over-designing, but I want the experience a four-input, four-output, stereo mixing setup for my PC setup, but I'm concerned that just tying all the ground lines from that many inputs is going to cause ground loops and similar issues.