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Ring oscillator using differential amplifier calculator

Year of fee payment : 4. Year of fee payment : 8. Year of fee payment : The present invention provides a current controlled oscillator comprising a first section providing a first differential output and a second section providing a second differential output. A loading structure comprised of resistive and reactive elements electrically connects the first differential output with the second differential output. The resistive and reactive elements have values chosen such that the resistive elements substantially extend the linear operating frequency range of the current controlled oscillator.


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WATCH RELATED VIDEO: 8 - MITx: 6.002x, CECC 2 - Ring oscilator circuit

Phase Noise Calculation in CMOS Single-Ended Ring Oscillators


Embodiments of the present invention relate to the field of semi-conductor circuits. More specifically, embodiments of the present invention relate to the field of ring oscillators for measuring characteristics of a semi-conductor device.

One of the challenges facing the users and designers of integrated circuits is managing the power produced by a chip. The power dissipated by a digital chip has two basic sources which are switching current and leakage current. When a gate is switching from one logical value to another, there is a brief period time where current passes through the transistors dissipating power in the form of heat.

However, with smaller geometries and reduced operating voltages, the leakage current is a significantly larger proportion of the power production problem.

Thus, chip designers need to develop both on and off chip techniques for dealing with leakage current. One of the challenges is accurately measuring the amount of leakage current that is actually present on a particular chip. Accordingly, what is needed is a system and method for accurately measuring the leakage current of a typical device on a chip. Embodiments of the present invention are directed toward a system and method for accurately measuring the leakage current of one or more transistors on a chip.

Specifically, a ring oscillator with a frequency directly related to the leakage current is described herein. In one embodiment of the present invention, a signal generation circuit is described. The signal generation circuit has a dynamic node driver with a pre-charge device and a leakage test device that is biased to an off state, a differential amplifier coupled to the dynamic node driver and to a delay unit.

The delay unit drives the pre-charge device. In another embodiment of the present invention, a signal generation circuit is described with a pre-charge device and a leakage test device that may be biased to an off state forming a dynamic node driver.

The dynamic node driver drives a test delay unit that may drive the pre-charge device. In another embodiment of the present invention, a signal generation circuit comprising a test oscillator with a dynamic node driver and a test loop delay and are reference oscillator with a reference loop delay is described.

The dynamic node driver has a leakage test device that is biased to an off state. The reference loop delay can be comparable to the test loop delay. In one embodiment of the present invention, a method of generating a signal with a frequency related to leakage current is further presented. The method involves driving a ring oscillator with a dynamic node driver. The dynamic node driver may have a pre-charge device and a leakage test device biased to an off state.

In another embodiment of the present invention, a method of measuring the leakage current is described. The method involves driving a ring oscillator with a dynamic node driver having a leakage test device biased to an off state to produce a test signal. The test signal is extracted and the frequency is measured. The leakage current is estimated from the measured frequency. These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment that are illustrated in the drawing figures.

The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the present invention and, together with the description, serve to explain the principles of the invention. Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings.

While the invention will be described in conjunction with the present embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention.

It will be apparent, however, to one skilled in the art, upon reading this disclosure, that the present invention may be practiced without these specific details. In other instances, well-known structures and devices are not described in detail in order to avoid obscuring aspects of the present invention. One exemplary structure is a ring oscillator composed of a pre-charge device , a leakage test device , a differential amplifier , and a delay unit The leakage test device is also known as the device under test DUT.

It is biased to the off-state. The leakage test device and the pre-charge device together form a dynamic node driver. When the pre-charge device is turned on, it brings the dynamic node up to voltage V dd. When the pre-charge device is turned off, the leakage test device lets the charge accumulated at the dynamic node bleed off. The resulting ring oscillator generates a periodic signal with a frequency that is directly related to the leakage current—a high leakage current results in a high frequency while a low leakage current results in a relatively low frequency.

The delay unit in combination with the differential amplifier and the pre-charge device must present an odd number of inversions around the loop. The periodic signal is tapped at test signal node The test signal measurement unit conditions the test signal at the test signal node by running it through one or more flip-flops or comparable numbers of latches as well as measuring the fundamental frequency of the test signal. The leakage current estimation unit performs a calculation on the measured frequency to estimate the leakage current in the leakage test device The signal is conditioned by running through a divider having one or more flip-flops or comparable numbers of latches.

In another embodiment, the divider serves to divide the frequency of test signal to a suitable level for the counter The signal produced by the divider increments counter The counter has a reset that is strobed with a periodic timing signal generated from a system clock or other stable and well-defined timing signal. The counter value thus represents the number of cycles in the test signal in the time of one period of the periodic timing signal. The counter value is thus proportional to the frequency of the test signal.

In this embodiment, the pre-charge device is a PMOS device and the leakage test device is an NMOS device configured to measure transistor leakage current. The differential amplifier compares the voltage of the dynamic node with a reference voltage Vref. In one embodiment, V ref is taken to be one half of V dd.

The differential amplifier produces a signal at differential node The delay unit in this embodiment is composed of a sequence of inverters If desired, additional delay can be placed in supplemental delay unit The delay unit in this embodiment also includes an enabling gate with an enable input The enable input can be used to stop the ring oscillator shown from operating.

The flip-flop is part of the divider The ring oscillator is initialized by setting the enable input to a low value. This prevents oscillation and yet turns the pre-charge device on. This drives the dynamic node to a high value. When the enable input goes to a high value, the pre-charge device is turned off. However, the dynamic node is initially at greater value than V ref , The differential amplifier and the delay elements with the appropriate number of inverters thus initially keeps the pre-charge device turned off.

Although the leakage test device is biased to the off-state, it does have a leakage current that bleeds off the charge at the dynamic node until the dynamic node voltage reaches V ref. At that point, the differential amplifier drives the differential node to a high level that in turn activates the pre-charge device The pre-charge device then quickly brings the voltage at the dynamic node back to a high level that in turn switches the differential amplifier to set the differential node to a low level.

The process then repeats. These relationships assume that the delay through the differential amplifier and the delay unit is negligible compared to the time it takes for the leakage test device to reduce the voltage at the dynamic node In another embodiment, the differential amplifier could be replaced with one or more inverters. Also note that the test signal can be obtained from any point within the ring oscillator.

The total delay around the loop should be sufficient to permit the proper operation of test signal measurement unit In some cases the delay through the differential amplifier and the delay unit may be significant compared to the fall time of the dynamic node In addition to the parts shown in FIG. The ring oscillator produces a reference signal with a fundamental frequency that is measured by the reference signal measurement unit The reference signal measurement unit can have a similar structure to the test signal measurement unit The leakage current estimation unit uses information about the test signal and the reference signal to compute an improved estimate of the leakage current.

In this embodiment, the reference differential amplifier compares the voltage of the reference node with a reference voltage Vref. In one embodiment, Vref is taken to be one half of V dd. The enable input can be used to stop the reference oscillator shown from operating. The flip-flop is part of the reference signal measurement unit The components of the reference oscillator should be adjusted and selected to produce a delay around the loop that is comparable to the delay found in the test differential amplifier and test delay unit The components are the same as in the embodiment shown in FIG.

For correct operation, at least one inverter should be extracted from the delay unit and placed after the connection to the bypass gate To generate a test signal using the test leakage device, the isolation gate is activated and the bypass gate is deactivated.

In this mode, the signal measurement unit measures the frequency of the test signal. To generate a reference signal, the isolation gate is deactivated and the bypass gate is activated, thus isolating the leakage test device In this mode, the signal measurement unit measures the frequency of the reference signal.

The leakage current estimation unit estimates the leakage current with two time-separated measurements made by the signal measurement unit with the ring oscillator in different modes. The isolation gate is implemented as a pass gate The bypass gate is implemented as another pass gate A test mode signal and the test mode signal negation control the pass gates. To make effective measurements the transistors forming the pass gates , should be significantly smaller than the leakage test device Because of non-uniformities in semi-conductor manufacturing process, the leakage current of a transistor could vary depending on its geometric orientation.

In one embodiment, a leakage test device could be constructed out of several transistors with different geometric orientations. Four multi-fingered or folded transistors are shown. Each transistor is on top of the P substrate. Each transistor comprises an N-diffusion region and a gate formed with one or more gate fingers formed with polysilicon.


1 Ghz Oscillator Circuit

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The circuit permits lower tuning gain through the use of as a normal differential ring oscillator, while the secondary loop.

A Low Power Low Phase Noise Oscillator for MICS Transceivers


Voltage-Controlled Oscillator Design. In order to explore the capabilities of the process and explain the difference in predicted and experimental performance, a high-speed, wide-bandwidth voltage-controlled oscillator VCO was developed as a "challenge" chip. The VCO was developed using digital CML circuits optimized for extreme high-speed operation but with the full-swing characteristics of digital logic. It was designed for a bandwidth of 0. Using newer device and interconnection models, the performance of the VCO may now be accurately predicted. In , several discrepancies had been uncovered between the circuit performance predicted by the Rockwell-supplied device and interconnection models and actual experimental measurements. We had designed relatively large circuits that were functional but operated at significantly lower speeds than expected. Furthermore, separate circuits on the same chip would often work but not at the same frequency or power supply level, severely inhibiting testing. The test chip yields were lower than expected but we believed that they would improve with time and the addition of better fabrication tools into the process in particular, a stepper from Canon with higher resolution.

Ring oscillator startup

ring oscillator using differential amplifier calculator

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Optics Express


In this paper, a novel voltage controlled oscillator VCO with low phase noise, low power consumption and wide tuning range in the industrial, scientific and medical ISM band is proposed for communication systems applications. The power consumption of the core is 2. One of the most important parts in transmitters is phase locked loop PLL , and their performance is strongly influenced by the voltage controlled oscillators VCO [1]. VCO is one of the newest comparator types [2] -[4]. VCO-based comparator and quantizer are one of the most important sections of successive approximation ADC and delta-sigma, respectively [5] -[10].

US7295079B2 - Current-controlled oscillator - Google Patents

JavaScript is disabled for your browser. Some features of this site may not work without it. Date Author Yadav, Rohit. Share Facebook. Metadata Show full item record.

The inductor Q in a LC oscillator circuit determines how accurately the oscillator can tune to certain oscillation frequency. As a result the inductor (and.

Colpitts Oscillator Frequency Range

A circuit and method thereof for measuring leakage current are described. The circuit includes a pre-charge device subject to a first backbias voltage and a leakage test device subject to a second backbias voltage. The leakage test device is coupled to the pre-charge device. The leakage test device is biased to an off state.

Ltspice Behavioral Voltage Source If Statement

RELATED VIDEO: Ring Oscillator Analysis Part 1

High voltage tolerant inverter. Patent number: Abstract: An inverter is presented. The inverter may be configured to receive an input voltage at an input node of the inverter, and to generate an output voltage at an output node of the inverter.

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Oscillator design with differential amplifier used BJT or FET

Colpitts Oscillator Frequency Range. This Colpitts oscillator produces a sine wave output in excess of 12Vpp at an approximate frequency set by the values chosen for L1, C2 and C3. Since it is a harmonic or linear oscillator, its frequency of oscillation is a derivative of the positive feedback rather than its input signal. The Colpitts Oscillator is a particularly good circuit for producing fairly low distortion sine wave signals in the RF range, 30kHz to 30MHz. This is basically a common emitter amplifier with a frequency dependent feedback network.

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